For example, in a manufacturing process of semiconductor devices, a single wafer plasma etching process for etching a substrate to be processed by using a plasma while using a resist as a mask is widely employed to form a predetermined pattern on a predetermined layer on a semiconductor wafer as the substrate to be processed.
Among various plasma processing apparatuses for performing such single wafer plasma etching process, a capacitively coupled parallel plate type etching apparatus has been mainly used.
The capacitively coupled parallel plate type plasma etching apparatus includes a pair of parallel plate type electrodes (an upper electrode and a lower electrode) disposed in a chamber, wherein a substrate to be processed is mounted on the lower electrode. By applying a high frequency power to either one of the two electrodes while introducing a processing gas into the chamber in a vacuum state, a high frequency electric field is formed between the two electrodes. Then, electrons are accelerated by the high frequency electric field. Ionization by collision between the electrons and a processing gas generates a plasma, so that a plasma etching can be performed on a predetermined layer of the semiconductor wafer by using the plasma.
In the capacitively coupled parallel plate type plasma etching apparatus, a cathode coupling method in which a high frequency power is applied to a lower electrode which mounts thereon a substrate to be processed and serves as a cathode enables an anisotropic etching by attracting ions in the plasma to the substrate with a self-bias voltage generated in the lower electrode.
Recently, in this cathode coupled type, there is suggested a dual frequency application type in which a first high frequency power of a relatively high frequency (generally greater than or equal to about 27 MHz) for plasma generation and a second high frequency power of a relatively low frequency (generally lower than or equal to about 13 MHz) for ion attraction are superposedly applied to the lower electrode for supporting the substrate (e.g., Japanese Patent Laid-open Application No. 2000-156370).
The lower electrode dual frequency application type is advantageous in that plasma density and anisotropic etching selectivity can be individually optimized by the first and the second high frequency power, and also in that the second high frequency power of a relatively low frequency can effectively suppress adhesion of deposits such as polymer and the like on the upper electrode.
With a recent trend of miniaturization of design rules for the manufacturing process of semiconductor devices or the like, plasma etching requires high dimension accuracy and, also, improved in-plane uniformity or etching selectivity to a base or a mask. Thus, the processing region in the chamber requires a low pressure and low ion energy. For that reason, a frequency considerably higher than a conventional frequency, which is higher than or equal to 40 MHz, is used for plasma generation.
However, when a high frequency power having a high frequency is used for plasma generation, a high frequency current tends to be concentrated at a central portion of an electrode. Since a plasma potential at the central portion becomes higher than that at the edge portion, the plasma density becomes non-uniform. Moreover, in the low-pressure and low-ion energy plasma generated by using the high frequency power of the high frequency, the non-uniformity of the plasma density caused by the in-plane non-uniformity of the plasma potential easily leads to non-uniformity of the processing or charge-up damages.
In order to solve the above-described problems, Japanese Patent Laid-open Application No. 2006-286814 suggests a technique for improving in-plane uniformity of plasma processing parameters such as an etching rate and the like by controlling a spatial distribution of a plasma potential by independently applying a DC voltage to an inner electrode and an outer electrode of an upper electrode.
However, even when the technique disclosed in Japanese Patent Laid-open Application No. 2006-286814 is applied to the plasma processing apparatus of the lower electrode dual frequency application type, there are generated problems in which a control range of an etching rate or the like decreases and deposits increased due to an improved etching rate causes CD (Critical Dimension) non-uniformity.